Milk-V Duo S SG2000 Public Preliminary Datasheet

Introduction of SG2000

SG2000 is a high-performance, low-power chip designed for various product fields such as edge intelligent surveillance IP cameras, local facial recognition attendance machines, and smart home devices. It integrates H.264/H.265 video compression and decoding and ISP capabilities. It supports various image enhancement and correction algorithms like HDR wide dynamic range, 3D noise reduction, defogging, and lens distortion correction, providing customers with professional-grade video image quality.

The chip also integrates an in-house TPU, delivering approximately 0.5TOPS of computing power under INT8 operations. The specially designed TPU scheduling engine efficiently provides high-bandwidth data flow for tensor processing unit cores. It also offers users a powerful deep learning model compiler and software SDK development kit. Mainstream deep learning frameworks such as Caffe, Pytorch, ONNX, MXNet, and TensorFlow (Lite) can be easily ported to this platform.

【SG2000 Public Preliminary Datasheet】

We have open sourced the Public Preliminary Datasheet and TRM of SG2000 to GitHub. please check it out.

DuoS GPIO Pinout

GPIO pin mapping

GROUP	ADDR	PORT	CHIP	NUM	NAME	START
gpio0	gpio@03020000	porta	gpiochip0	480-511	XGPIOA	480 - XGPIOA[0]
gpio1	gpio@03021000	portb	gpiochip1	448-479	XGPIOB	448 - XGPIOB[0]
gpio2	gpio@03022000	portc	gpiochip2	416-447	XGPIOC	416 - XGPIOC[0]
gpio3	gpio@03023000	portd	gpiochip3	384-415
gpio4	gpio@05021000	porte	gpiochip4	352-383	PWR_GPIO	352 - PWR_GPIO[0]

Header J3

GPIO oPIO on `Header J3` use 3.3V logic levels.

GND*: Pin 9 is a low-level GPIO in the V1.1 version of the hardware, and is GND in the V1.2 version and later.

Header J4

GPIO E0/E1/E2 on `Header J4` use 1.8V logic levels.

LED PIN

NAME	SG2000	NUM
LED	XGPIOA[29]	509

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Milk-V Duo S 512MB SG2000 RISC V Linux Board Top-Version-Milk-V-Duo Option WiFi / EMMC-8G / POE

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