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Milk-V Duo S SG2000 Public Preliminary Datasheet

Introduction of SG2000

SG2000 is a high-performance, low-power chip designed for various product fields such as edge intelligent surveillance IP cameras, local facial recognition attendance machines, and smart home devices. It integrates H.264/H.265 video compression and decoding and ISP capabilities. It supports various image enhancement and correction algorithms like HDR wide dynamic range, 3D noise reduction, defogging, and lens distortion correction, providing customers with professional-grade video image quality.


The chip also integrates an in-house TPU, delivering approximately 0.5TOPS of computing power under INT8 operations. The specially designed TPU scheduling engine efficiently provides high-bandwidth data flow for tensor processing unit cores. It also offers users a powerful deep learning model compiler and software SDK development kit. Mainstream deep learning frameworks such as Caffe, Pytorch, ONNX, MXNet, and TensorFlow (Lite) can be easily ported to this platform.

【SG2000 Public Preliminary Datasheet】

We have open sourced the Public Preliminary Datasheet and TRM of SG2000 to GitHub. please check it out.

DuoS GPIO Pinout




GPIO pin mapping

GROUPADDRPORTCHIPNUMNAMESTART
gpio0gpio@03020000portagpiochip0480-511XGPIOA480 - XGPIOA[0]
gpio1gpio@03021000portbgpiochip1448-479XGPIOB448 - XGPIOB[0]
gpio2gpio@03022000portcgpiochip2416-447XGPIOC416 - XGPIOC[0]
gpio3gpio@03023000portdgpiochip3384-415
gpio4gpio@05021000portegpiochip4352-383PWR_GPIO352 - PWR_GPIO[0]

Header J3

GPIO oPIO oHeader J3 use 3.3V logic levels.




GND*: Pin 9 is a low-level GPIO in the V1.1 version of the hardware, and is GND in the V1.2 version and later.

Header J4

GPIO E0/E1/E2 on Header J4 use 1.8V logic levels.




LED PIN

NAMESG2000NUM
LED
XGPIOA[29]509
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