• sales

    +86-0755-88291180

7.5inch HD e-Paper HAT (B)

Introduction

Note: The raw panel require a driver board, If you are the first time use this e-Paper, we recommend you to buy the HAT version or buy more one driver hat for easy use, otherwise you need to make the driver board yourself. And this instruction is based on the version with PCB or driver board.

Interfaces

VCC3.3V
GNDGND
DINSPI MOSI
CLKSPI SCK
CSSPI chip select (Low active)
DCData/Command control pin (High for data, and low for command)
RSTExternal reset pin (Low for reset)
BUSYBusy state output pin (Low for busy)

Working principle

Introduction

This product is an E-paper device adopting the image display technology of Microencapsulated Electrophoretic Display, MED. The initial approach is to create tiny spheres, in which the charged color pigments are suspending in the transparent oil and would move depending on the electronic charge. The E-paper screen display patterns by reflecting the ambient light, so it has no background light requirement. Under sunshine, the E-paper screen still has high visibility with a wide viewing angle of 180 degree. It is the ideal choice for E-reading.

Communication protocol




Note: Different from the traditional SPI protocol, the data line from the slave to the master is hidden since the device only has display requirement.

  • CS is slave chip select, when CS is low, the chip is enabled.
  • DC is data/command control pin, when DC = 0, write command, when DC = 1, write data.
  • SCLK is the SPI communication clock.
  • SDIN is the data line from the master to the slave in SPI communication.

SPI communication has data transfer timing, which is combined by CPHA and CPOL.

  1. CPOL determines the level of the serial synchronous clock at idle state. When CPOL = 0, the level is Low. However, CPOL has little effect to the transmission.
  2. CPHA determines whether data is collected at the first clock edge or at the second clock edge of serial synchronous clock; when CPHL = 0, data is collected at the first clock edge.
  • There are 4 SPI communication modes. SPI0 is commonly used, in which CPHL = 0, CPOL = 0.

As you can see from the figure above, data transmission starts at the first falling edge of SCLK, and 8 bits of data are transferred in one clock cycle. In here, SPI0 is in used, and data is transferred by bits, MSB first.

TAG: MPW7 Raspberry Pi 5 PCIe to WIFI7 Adapter Board HAT Pi5 For Google TPU BE200 AX210 AI Raspberry Pi Compute Module 5 PoE BASE A IO Board RJ45 For CM5 Lite/eMMC Raspberry Pi 5 PoE MINI HAT(G) Power over RJ45 Ethernet 802.3af/at Moudle for Pi5 RS485 Interface ESP32-P4 DEV-KIT C6 WiFi6 MIPI DSI 7/10.1 inch Display/CSI Camera/Audio Speaker For AI Deepseek Raspberry Pi Pico 2 RP2350 2.8 inch LCD Capacitive TouchScreen Development Board 240x320 Display QMI8658 6-Axis /PCM5101 Audio /SD /RTC /Battery Port ESP32 0.85inch LCD Sipeed NanoCluster Mini Cluster Board mini data center For Raspberry Pi CM45 / Computer /LM3H /M4N RM520N GL 5G/4G/3G M.2 Moudle IoT EMBB For LTE-A/NSA/SA And GNSS For DFOTA /VoLTE For Quectel Programmable Magnetic Encoder DDSM400 Direct Drive Servo Motor All-In-One Design Hub Serial -LIN Bus Motor Milk V Duo IO Board Pi5 Raspberry Pi 18.5 inch Type C/HDMI/4K Display Screen 3840×2160 Computer PC Phone Xbox/PS4/Switch Raspberry Pi 5 DSI display 0.96inch1.3inch1.44inch1.8inch LCD Display Screen Round Arduino Raspberry Pi ESP32 Pico STM32 Raspberry Pi 5 Case RS485 Bus UART TTL To RS485 C Built-In Protection Circuits Zero LCD HAT (A)