• sales

    +86-0755-88291180

2.9inch e-Paper (D)

Introduction


Note: The raw panel require a driver board, If you are the first time use this e-Paper, we recommend you to buy the HAT version or buy more one driver hat for easy use, otherwise you need to make the driver board yourself. And this instruction is based on the version with PCB or driver board. 296*128, 2.9inch flexible E-Ink display HAT for Raspberry Pi, SPI interface. Support partial refresh.


Interfaces


VCC3.3V
GNDGND
DINSPI MOSI
CLKSPI SCK
CSSPI chip select (Low active)
DCData/Command control pin (High for data, and low for command)
RSTExternal reset pin (Low for reset)
BUSYBusy state output pin (Low for busy)


Working principle


Introduction


This product is an E-paper device adopting the image display technology of Microencapsulated Electrophoretic Display, MED. The initial approach is to create tiny spheres, in which the charged color pigments are suspending in the transparent oil and would move depending on the electronic charge. The E-paper screen display patterns by reflecting the ambient light, so it has no background light requirement. Under sunshine, the E-paper screen still has high visibility with a wide viewing angle of 180 degree. It is the ideal choice for E-reading.




Note: Different from the traditional SPI protocol, the data line from the slave to the master is hidden since the device only has display requirement.

  • CS is slave chip select, when CS is low, the chip is enabled.
  • DC is data/command control pin, when DC = 0, write command, when DC = 1, write data.
  • SCLK is the SPI communication clock.
  • SDIN is the data line from the master to the slave in SPI communication.

SPI communication has data transfer timing, which is combined by CPHA and CPOL.

  1. CPOL determines the level of the serial synchronous clock at idle state. When CPOL = 0, the level is Low. However, CPOL has little effect to the transmission.
  2. CPHA determines whether data is collected at the first clock edge or at the second clock edge of serial synchronous clock; when CPHL = 0, data is collected at the first clock edge.
  • There are 4 SPI communication modes. SPI0 is commonly used, in which CPHL = 0, CPOL = 0.

As you can see from the figure above, data transmission starts at the first falling edge of SCLK, and 8 bits of data are transferred in one clock cycle. In here, SPI0 is in used, and data is transferred by bits, MSB first.


TAG: Raspberry Pi 5 PD Induction Mini Uninterruptible Power Supply module Supports charging And Power output at the same time 5V 2.5A RP2040 Raspberry Pi 5 Audio Jack Raspberry Pi NVIDIA Jetson TX2 NX Module Bevelopment Board DeepSeek XiaoZhi AI Voice Chat Robot BOX ESP32-S3 Development Board 1.85 inch Round LCD N16R8 AI Board Raspberry Pi 5 Raspberry Pi 5 8mp Camera X1004 Pi 5 PCIe to M.2 NVMe SSD Board X1300 X1300-A2 Raspberry Pi 5 HDMI to CSI-2 Shield 1080P@60fps & Audio & Video Also Gripper Serial Robotic Arm Gripper Mechanical claw Serial Bus Servo ST3215/CF35-12 Raspberry Pi CM5 IO BASE B Mini Board a Base Development Platform Compute Module 5 IO Board with EEPROM And Encryption chip RS232 to CAN 0.96inch RGB OLED Raspberry Pi Pico 2 RP2350 industrial 6-ch Relay RS485 isolation protection Milk V Duo IO Board Tutorial