• sales

    +86-0755-88291180

2.9inch e-Paper (D)

Introduction


Note: The raw panel require a driver board, If you are the first time use this e-Paper, we recommend you to buy the HAT version or buy more one driver hat for easy use, otherwise you need to make the driver board yourself. And this instruction is based on the version with PCB or driver board. 296*128, 2.9inch flexible E-Ink display HAT for Raspberry Pi, SPI interface. Support partial refresh.


Interfaces


VCC3.3V
GNDGND
DINSPI MOSI
CLKSPI SCK
CSSPI chip select (Low active)
DCData/Command control pin (High for data, and low for command)
RSTExternal reset pin (Low for reset)
BUSYBusy state output pin (Low for busy)


Working principle


Introduction


This product is an E-paper device adopting the image display technology of Microencapsulated Electrophoretic Display, MED. The initial approach is to create tiny spheres, in which the charged color pigments are suspending in the transparent oil and would move depending on the electronic charge. The E-paper screen display patterns by reflecting the ambient light, so it has no background light requirement. Under sunshine, the E-paper screen still has high visibility with a wide viewing angle of 180 degree. It is the ideal choice for E-reading.




Note: Different from the traditional SPI protocol, the data line from the slave to the master is hidden since the device only has display requirement.

  • CS is slave chip select, when CS is low, the chip is enabled.
  • DC is data/command control pin, when DC = 0, write command, when DC = 1, write data.
  • SCLK is the SPI communication clock.
  • SDIN is the data line from the master to the slave in SPI communication.

SPI communication has data transfer timing, which is combined by CPHA and CPOL.

  1. CPOL determines the level of the serial synchronous clock at idle state. When CPOL = 0, the level is Low. However, CPOL has little effect to the transmission.
  2. CPHA determines whether data is collected at the first clock edge or at the second clock edge of serial synchronous clock; when CPHL = 0, data is collected at the first clock edge.
  • There are 4 SPI communication modes. SPI0 is commonly used, in which CPHL = 0, CPOL = 0.

As you can see from the figure above, data transmission starts at the first falling edge of SCLK, and 8 bits of data are transferred in one clock cycle. In here, SPI0 is in used, and data is transferred by bits, MSB first.


TAG: Sipeed NanoKVM-USB Finger-sized 4K USB KVM for Server/SBCs Industrial 4-ch RS485 DC Detection Module Modbus RTU DIN Rail Raspberry Pi Touch Display 2 Official Original Capacitive TouchScreen 7 inch LCD TFT 720x1280 Core2021 LoRa LR2021 HF LF SPI LoRaWAN For Sub-GHz and 2.4GHz USB to CAN STM32 1.5inch LCD ESP32-S3 1.28inch ESP32-S3 AI 3.97-inch e-Paper Ink Screen 3.97inch Display AIoT Development Board Deepseek Raspberry Pi Real time clock Raspberry Pi UPS SIM8260G M2 3G/4G/5G/GNSS/GPS Sub-6G PCIe M.2 Moudle For LTE-A/NSA/SA For DFOTA /VoLTE For SIMCOM ESP32-C6 2.16inch AMOLED Display AI Development Board 480×480 2.16 inch TouchScreen Deepseek ESP32 1.54 inch E-Paper Smart Watch display Screen 200x200 Ultra-low power For Arduino/Micropython/RTOS For Watchy ESP32 UART USB Bus Servo ST RSBL Driver board For Raspberry PI Robot ESP32 LVGL Sipeed Lichee Tang Nano 9K FPGA MINI Development Board GW1NR-9 GOAI Gowin Jetson Orin Nano/NX Super Developer IO Base Development Board Dual network RJ45 For Jetson Orin Nano/NX Module SC09 Serial UART Bus Servo Motor Switchable 2.3kg 300Angle ESP32 desktop trinket Milk-V