• sales

    +86-0755-88291180

2.9inch e-Paper (C)

Introduction


Note:
 The raw panel require a driver board, If you are the first time use this e-Paper, we recommend you to buy the HAT version or buy more one driver hat for easy use, otherwise you need to make the driver board yourself. And this instruction is based on the version with PCB or driver board.

296x128, 2.9inch E-Ink display module, three-color, SPI interface


Interfaces


VCC3.3V
GNDGND
DINSPI MOSI
CLKSPI SCK
CSSPI chip select (Low active)
DCData/Command control pin (High for data, and low for command)
RSTExternal reset pin (Low for reset)
BUSYBusy state output pin (Low for busy)


Working principle


Introduction


This product is an E-paper device adopting the image display technology of Microencapsulated Electrophoretic Display, MED. The initial approach is to create tiny spheres, in which the charged color pigments are suspending in the transparent oil and would move depending on the electronic charge. The E-paper screen display patterns by reflecting the ambient light, so it has no background light requirement. Under sunshine, the E-paper screen still has high visibility with a wide viewing angle of 180 degree. It is the ideal choice for E-reading.




Note: Different from the traditional SPI protocol, the data line from the slave to the master is hidden since the device only has display requirement.

  • CS is slave chip select, when CS is low, the chip is enabled.
  • DC is data/command control pin, when DC = 0, write command, when DC = 1, write data.
  • SCLK is the SPI communication clock.
  • SDIN is the data line from the master to the slave in SPI communication.

SPI communication has data transfer timing, which is combined by CPHA and CPOL.

  1. CPOL determines the level of the serial synchronous clock at idle state. When CPOL = 0, the level is Low. However, CPOL has little effect to the transmission.
  2. CPHA determines whether data is collected at the first clock edge or at the second clock edge of serial synchronous clock; when CPHL = 0, data is collected at the first clock edge.
  • There are 4 SPI communication modes. SPI0 is commonly used, in which CPHL = 0, CPOL = 0.

As you can see from the figure above, data transmission starts at the first falling edge of SCLK, and 8 bits of data are transferred in one clock cycle. In here, SPI0 is in used, and data is transferred by bits, MSB first.


TAG: Milk V Duo 4.26inch-e-Paper D-Robotics RDK X3 Development Board Horizon Sunrise Pi ARM Cortex-A53 5Tops 2GB/4GB RAM Raspberry Pi Zero 4G Cat1 With USB Hub Expansion Board LTE/GPS/EA/EU also For Zero 2W UART To Ethernet Raspberry Pi Pico 2 P2350-Plus Smart Car Kit PicoGo2 Autonomous Driving Learning Car 3.5inch RPi LCD (A) Manual Configuration Jetson Nano 4G module RS485 Bus Jetson RTL8822CE 5GHz WiFi Wireless Bluetooth5 Card NGFF-M.2 RTL8822CE-CG Core Raspberry Pi PICO Long-Range Communication Power Manager Module Raspberry Pi 1.54inch LCD Bookworm-Desktop Display and Touch RP2040 Refractive Prism ESP32 C3 LCD Development Board 1.3 inch Display Screen ST7789 240x240 3D Transparent Refractive Prism Mini TV For Arduino Raspberry Pi PICO LoRa Changeable Photo Frames Integrated capacitive fingerprint module Cortex core UART serial port High-precision fingerprint recognition Milk-V Duo