• sales

    +86-0755-88291180

2.9inch e-Paper Module (B)

Introduction


Note:
 The raw panel require a driver board, If you are the first time use this e-Paper, we recommend you to buy the HAT version or buy more one driver hat for easy use, otherwise you need to make the driver board yourself. And this instruction is based on the version with PCB or driver board.

296x128, 2.9inch E-Ink display module, three-color, SPI interface


Interfaces


VCC3.3V
GNDGND
DINSPI MOSI
CLKSPI SCK
CSSPI chip select (Low active)
DCData/Command control pin (High for data, and low for command)
RSTExternal reset pin (Low for reset)
BUSYBusy state output pin (Low for busy)


Working principle


Introduction


This product is an E-paper device adopting the image display technology of Microencapsulated Electrophoretic Display, MED. The initial approach is to create tiny spheres, in which the charged color pigments are suspending in the transparent oil and would move depending on the electronic charge. The E-paper screen display patterns by reflecting the ambient light, so it has no background light requirement. Under sunshine, the E-paper screen still has high visibility with a wide viewing angle of 180 degree. It is the ideal choice for E-reading.




Note: Different from the traditional SPI protocol, the data line from the slave to the master is hidden since the device only has display requirement.

  • CS is slave chip select, when CS is low, the chip is enabled.
  • DC is data/command control pin, when DC = 0, write command, when DC = 1, write data.
  • SCLK is the SPI communication clock.
  • SDIN is the data line from the master to the slave in SPI communication.

SPI communication has data transfer timing, which is combined by CPHA and CPOL.

  1. CPOL determines the level of the serial synchronous clock at idle state. When CPOL = 0, the level is Low. However, CPOL has little effect to the transmission.
  2. CPHA determines whether data is collected at the first clock edge or at the second clock edge of serial synchronous clock; when CPHL = 0, data is collected at the first clock edge.
  • There are 4 SPI communication modes. SPI0 is commonly used, in which CPHL = 0, CPOL = 0.

As you can see from the figure above, data transmission starts at the first falling edge of SCLK, and 8 bits of data are transferred in one clock cycle. In here, SPI0 is in used, and data is transferred by bits, MSB first.

TAG: Jetson Orin Nano Super AI Developer Kit Built in Jetson Orin Nano 8GB Memory Core board UART TTL To RS485 C Built-In Protection Circuits RS485 Bus Magnetic Encoder Servo Motor 45KG.CM 24V 360° RS485 High Precision And Large Torque Raspberry Pi SIM7670G LTE-4G-Cat-1/GNSS/USB-HUB Expansion Board Raspberry Pi Pico W Raspberry Pi Camera Case Raspberry Pi 7 inch HMI industrial DSI Display LCD 7inch TouchScreen Computer 720×1280 RS485 Pi5 Raspberry Pi 5 Argon-NEO-M.2-NVME-PCIE-Expansion-Board Only For Argon NEO 5 Case (Not include) 240x280 Raspberry Pi 5 Fan MPS2280D Raspberry Pi 5 PCIe to M.2 NVMe Dual SSD Adapter Board HAT Pi5 Double 2280 ESP32-S3 AI Electronic Eye Development Doard DualEye TouchEye 1.28 inch TouchScreen LCD Round Display N16R8 Toy Doll Robot 360° NanoKVM-Lite-Quick-Start Multi Protection Jetson Orin Nano/NX Super Developer IO Base Development Board Dual network RJ45 For Jetson Orin Nano/NX Module UNO Minima RA4M1 ZERO Tiny SuperMini R7FA4M1 Board Compatible With R4 For Arduino