Tang Nano Series FPGA FAQ

1. Programmer

Make sure there are 2 converter and COM device, this means the debugger works well.

The debugger can be used for Jtag and UART, when using its uart function, Jtag is disabled. To solve this, replug the TypeC cable of your board to disconnect the uart connection.

1.1. No COM devices

If there is no COM device but 2 converter devices, right click converter B -> Properties -> Advanced -> Load VCP , then Click OK and reconnect your USB device.

1.2. No convertor device

It takes 10 seconds for debugger loading the driver. And you can install the driver manually. Click me to download driver

1.3. Download frequency

Make sure the frquency is equal or lower than 2.5MHz, otherwise it may lead some troubles like burnning bitstream file really slow or failed burnning bitstream file.

Choose Frequency equal to or lower than 2.5MHz

Then cilck Save

1.4. Error found

This error means the Programmer application does detect debugger or your driver is wrong.
Visit this programmer compressed file, download it and extract it, replace the programmer folder install with GOWIN IDE by this extracted file.

If you don't know how to replace the programmer folder, just excute the programmer application in the extracted folder to download bisdtream file instead of the programmer application installed with GOWIN IDE.

If this problem still occurs after you use our recommended programmer application, try to rerun this application. If all attemps fail, see the begin of this documents about converter.

1.5. Cable lost

Reflash bitstream to solve this. This occurs when flashing bitsteram, board and computer does not well disconneted.

1.6. Cabel open failed

This means the programmer application does not detect the debugger, try this programmer application mentioned in Error found.

If this problem still occurs after you use our recommended programmer application, try to rerun this application. If all attemps fail, see the begin of this documents about converter.

1.7. No Gowin devices found

This means the debugger does not detect the FPGA chip, you can use the latest GOWIN Programmer to slove this problem.

1.7.1. Nano 9K

Because the FPGA JTAG_SEL pin is routed to Key S2, from the GOWIN mannual we can see when JTAGSEL_N=0 (Active low), Jtag is enabled.

For Nano 9K, hold S2 key to solve the trouble caused by JTAGSEL_N and JTAG pins are being used as I/O.

1.7.2. Primer 20K

For 20K Dock kits, it's necessary to enable the core board before using debugger debug the chip, just put the 1 switch on the dip switch down, otherwise this error occurs.

When using RV Debugger Plus burnning firmware into 20K core board this error occurs, possibly the order of connectting wire is wrong, make sure your connectting order is same as following sheet, or you can check your core board jtag connector inside pins, make sure none of them are crooked(One time we get problem connecting Debugger with core board and finnaly check out that there is a crooked pin in the jtag connector, this maybe because of doing wrong connection operations when connecting)

The JTAG pin orders can be found in the back of 20K core board.

1.8. ID code mismatch

This means the selected device in the project mismatch your burnning chip. All that refers chip model(The project device, pin constrain, IP modules and programmer device choose) need to be reset.

GFDS 

1.9. spi flash selected mismatch

The board using GOWIN Semiconductor LittleBee product family (Series of chip names beginning with GW1N) incorporates embedded FLASH in main chip, so when burning firmware we burn into embedded FLASH, and reagrd the external FLASH as a peripheral.

The board using GOWIN Semiconductor Arora product family (Series of chip names beginning with GW1N) does not incorporate embedded FLASH, so when burning firmware we burn into external FLASH, and the operations are as followed .

1.10. Download slowly

Don't choose Operation containing Verify

Make sure the frquency is equal or lower than 2.5MHz, normally 2.5MHz everything is ok.

Choose Frequency equal to or lower than 2.5MHz

Then cilck Save

1.11. Directory *** has null character.

Error character of the project path.

• Close IDE.
• Check projrct path, only English works and _ are Ok, take care of the blank character in the path.
• Reopen the project, clean and rerun your project.

1.12. Can't find bistream file

Normally the bistream file with extension name .fs is in the impl/pnr folder under the project path.

From the picture above we can know the of this bistream file path is fpga_project1/impl/pnr/fpga_project1.fs

The fpga_project1 is the project directory, the impl folder is generated by IDE, and the download is in the pnr folder.

The file with extension name .fs is the firmware we will burn into fpga.

2. IDE

2.1. See IP manual

In the IP Core generate interface of IDE, click your target IP, then choose your language reference to see the IP manual.

2.2. Reconfigure generated IP

In the IP Core generate interface of IDE, click the folder icon next to device selection at the top to open the generated IP configuration interface.

2.3. Set top module

For project containning muti-projects, if you succeed generating your module, right-click the module you want to set as the top module IDE -> Hierarchy interface.

If your Hierarchy interface is the same as what is in the left picture, this means there are logic errors in the code, such as syntax errors or generate errors. Click 'RTL Anakysis Error' in the upper right corner then you can see the error type code and location of the error in the dialog box that pops up, as shown in the right picture in the following table.

2.4. Using GAO

GAO is Gowin Analyzer Oscilloscope, its document can be found in the path like what is shown below

Using this programmer application instead of the programmer application installed with, then you can use GAO.(GAO need run by IDE, so you need to replace the Programmer bin folder by your downloaded one)