• sales

    +86-0755-88291180

1.54inch e-Paper (B)

Introduction

Note: The raw panel require a driver board, If you are the first time use this e-Paper, we recommend you to buy the HAT version or buy more one driver hat for easy use, otherwise you need to make the driver board yourself. And this instruction is based on the version with PCB or driver board.

200x200, 1.54inch E-Ink display module, three-color, SPI interface


Interfaces

VCC3.3V
GNDGND
DINSPI MOSI
CLKSPI SCK
CSSPI chip select (Low active)
DCData/Command control pin (High for data, and low for command)
RSTExternal reset pin (Low for reset)
BUSYBusy state output pin (Low for busy)


Working principle

Introduction

This product is an E-paper device adopting the image display technology of Microencapsulated Electrophoretic Display, MED. The initial approach is to create tiny spheres, in which the charged color pigments are suspending in the transparent oil and would move depending on the electronic charge. The E-paper screen display patterns by reflecting the ambient light, so it has no background light requirement. Under sunshine, the E-paper screen still has high visibility with a wide viewing angle of 180 degree. It is the ideal choice for E-reading.

Communication protocol



Note: Different from the traditional SPI protocol, the data line from the slave to the master is hidden since the device only has display requirement.

  • CS is slave chip select, when CS is low, the chip is enabled.
  • DC is data/command control pin, when DC = 0, write command, when DC = 1, write data.
  • SCLK is the SPI communication clock.
  • SDIN is the data line from the master to the slave in SPI communication.

SPI communication has data transfer timing, which is combined by CPHA and CPOL.

  1. CPOL determines the level of the serial synchronous clock at idle state. When CPOL = 0, the level is Low. However, CPOL has little effect to the transmission.
  2. CPHA determines whether data is collected at the first clock edge or at the second clock edge of serial synchronous clock; when CPHL = 0, data is collected at the first clock edge.
  • There are 4 SPI communication modes. SPI0 is commonly used, in which CPHL = 0, CPOL = 0.

As you can see from the figure above, data transmission starts at the first falling edge of SCLK, and 8 bits of data are transferred in one clock cycle. In here, SPI0 is in used, and data is transferred by bits, MSB first.

TAG: series bus servos Raspberry Pi Pico UART Serial Server ESP32 Google Dinosaur game Modbus POE ETH Relay Waveshare User Guide Raspberry Pi 5inch Display 1024x600 HDMI Capacitive TouchScreen 5 inch LCD B Wide-Cover For Mini PC X1012 Raspberry Pi 5 POE And PCIe to M.2 NVMe SSD Board Pi5 2280 Power over Ethernet Luckfox Pico Max Raspberry Pi 5 Box Case Ki-A PCIe to RJ45 Gigabit Ethernet All Ports To Pi's USB Side Milk V Duo IO Board SpotPear Modbus POE ETH Relay MQTT User Guide Raspberry Pi 5 RS232 to RS485 Raspberry Pi AI Camera Official Original 12MP IMX500 Intelligent visual Sensor On-Board RP2040 Industrial Modbus POE ETH RJ45 To Relay 30CH RTU/Modbus TCP-Ethernet For IOT AI Machine Vision Kit OAK-D-POE JPEG Encoder 12MP IP67 Waterproof 4TOPS OpenCV Camera ESP32-S3R2 Dual-MCU-Board Raspberry Pi LCD